James Lu’s Research News:
· "New Method for Compacting Carbon Nanotubes into Tight Bundles" , AZoNano.com | The A to Z of Nanotechnology, June 07, 2007.
· "The Original Nano Workout: Helping Carbon Nanotubes Get Into Shape" , RPI Press Release, June 06, 2007.
· EE Times Top Story "Bunched nanotubes show promise for conducting electricity", Nicolas Mokhoff (06/07/2007 9:42 AM EDT)
· Received several plaques from the general chair of the IMAPS International Conference and Exhibition on Device Packaging in recognition of Lu’s service to the society. Reported in MILESTONES of Rensselaer Alumni Magazine - Summer 2006. Dr. Lu served as the Technical Chair, Workshop Chair and Session Chair of the 3D Packaging Workshop at the International Microelectronics and Packaging Society (IMAPS) Conference since 2006. Dr. Lu is also a member (3D Chair) of the IMAPS National Technical Committee.
· “Rensselaer Polytechnic Institute recently introduced a via-first 3D technology platform in which in a single hybrid bonding step, bonds of copper-to-copper, BCB-to-BCB and Cu-to-BCB can be formed over the entire wafer”, reported in an article of Electronic Trends by Steve Berry and Sandra Winkler, in the July 2006 Issue of Chip Scale Review magazine, page 9.
The article entitled, "More Life For Moore's Law - Chipmakers can't keep using the same tricks to boost speed" includes Dr. Lu's work in the area of 3D chip development.
· “Designing for New Dimensions: Rensselaer researchers reach for new heights with 3-D chip technology”, Printer-friendly PDF version, Rensselaer Research Quarterly, Spring 2005
“Just as civil engineers of the 1880s began building skyscrapers in crowded cities, Lu is pioneering chip real estate by developing high-rise, 3-D chips to alleviate congestion in integrated circuits.”
· Future ICs Go Vertical, in Semiconductor International, Feb. 14, 2005
· Press Release: “Rensselaer Researchers Funded for 3-D Computer Chip Development”, at Rensselaer Polytechnic Institute, Dec. 06, 2004.
“A team of Rensselaer researchers working to develop 3-D vertical, or stacked, chips into high-speed integrated systems to meet the increasing memory and processing demands that exceed conventional 2-D computer chips as processor speeds increase toward 10 GHz and higher, have received new funding to move the concept to commercialization. “
“The specific project involves design of 3-D processor memory stacks, headed by McDonald, and research on key technologies needed for 3-D chip fabrication, such as wafer alignment, headed by Lu.”
“As today's silicon technology reaches its technical limits in many areas, developers are looking for new ways to design better chips. Typically, they look for ways to make chips faster, more energy efficient, and costeffective, while still using current fabrication techniques and materials.”
“…… companies are working on high-rise, multilayer chips. Instead of laying out the vast majority of a chips' circuitry on a single layer of silicon, they are making chips with circuitry arranged vertically as well as horizontally. “
· "Up, Not Sideways", PC Magazine: October 28, 2003.
· “When the 3-D Chips are Down”, the Alchemist News at The Alchemist The ChemWeb Magazine, 8 September 2003.
“Mixing the systems on a 3-D chip will enable technology for future chips to be low-cost and will also allow nanoelectronic, opto-electronic, and biochemical circuits to be integrated into heterogeneous systems,” says Lu.
· Peter Singer (Editor-in-Chief), “3-D ICs: How They Stack Up at RPI”, Tech News of Emerging Technologies, <<Semiconductor International>> magazine, vol. 26, No. 8, p. 44, July 2003.
“Lu believes that a strategy where several wafers are bonded together and interconnected provides a more effective means of integrating chip technologies, while also increasing performance.
‘We're developing monolithic wafer-level 3-D integration processes that potentially can achieve all the advantages of system-on-a-chip and system-in-a-package, while lowering cost, enabling the use of small form factors and achieving high performance,’ Lu said. “
· Robert A. Metzger (Editor), "Top Development in Microelectronics in 1998" <<Compound Semiconductor>> magazine, vol. 4, No. 9, page 22, Dec. 1998.
· Jack Browne (Publisher/Editor), "IEDM Preview, Device Technology Advances at 44th
IEDM" <<Microwave & RF
· Paul Marks
(Journalist), "Make Waves"
in <<New Scientist>>
· Several times on Magazines and Campus News of Rensselaer Polytechnic Institute
· WGY Radio News, Valley Tech Report, Sept. 8, 2003, http://www.WGY.com
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